The production and manufacturing of circuit boards (PCBs) is a system engineering that covers material science, precision machining, chemical processes, and testing technology. Its process needs to be adjusted according to the number of layers (single-layer/double-layer/multi-layer/HDI), structure (rigid board/flexible board), and performance requirements (high-frequency/high Tg/high heat dissipation). The following provides a detailed explanation of the six core stages of material preparation, inner layer production, drilling and electroplating, outer layer production, surface treatment, forming, and testing, combined with professional terminology:

1、 MATERIAL PREPARATION: PRECISE SELECTION OF BASIC CARRIERS

The material selection of PCB directly affects electrical performance (impedance, signal integrity), mechanical performance (board warping, strength), and environmental adaptability (temperature resistance, moisture resistance). Core materials include:

1. Substrate

Type:

Rigid substrate: epoxy glass cloth substrate (FR4, Tg ≥ 130 ℃), high-frequency and high-speed substrate (Rogers RO4350B, Df ≤ 0.0037); Panasonic Megtron 6, Df ≤ 0.002), polyimide (PI, for flexible boards);

Flexible Substrate (FPC): Polyimide (PI) or Polyester (PET), requiring high flexibility (bending radius ≤ 5mm).

Key parameters:

Thickness deviation: ≤± 5 μ m (conventional board ≤± 10 μ m);

Coefficient of thermal expansion (CTE): ≤ 17ppm/℃ (X-Y direction), ≤ 27ppm/℃ (Z direction);

Dielectric constant (Dk): FR4 is about 4.5, and high-frequency materials are ≤ 3.66 (such as RO4350B).

2. Prepreg (PP)

Function: Interlayer adhesive medium, composed of partially cured epoxy resin and fiberglass cloth;

Selection criteria:

Model matching: 7628 (thick resin, suitable for large spacing layers), 2116 (thin resin, suitable for fine circuits), 1080 (ultra-thin resin, used for HDI);

Resin content (RC): 45% -55% (matching the thickness of the core board to avoid glue flow);

Pre solidification degree (Flow): Low flow PP (Flow ≤ 25%) to prevent resin overflow during compression.

2、 INNER LAYER PRODUCTION: "CORNERSTONE FORMING" OF MULTI-LAYER STRUCTURE

The inner layer is the core layer of a multi-layer PCB (usually an even layer), which requires fine lines (line width/line spacing ≤ 100 μ m) to be formed through pattern transfer, oxidation treatment, and inner layer etching. The key processes are as follows:

1. Inner layer graphic transfer

Convert the design file (Gerber) into an inner layer circuit pattern using negative film technology (conventional) or positive film technology (fine circuit):

Coating photosensitive adhesive:

Dry Film (DF): thickness 25 μ m (17 μ m for fine circuits), film temperature 110-130 ℃, pressure 0.3-0.5MPa (to avoid bubbles);

Wet Film: Thickness of 15 μ m (low cost, suitable for conventional boards), requiring control of coating uniformity (thickness deviation ≤± 2 μ m).

Exposure and development:

Exposure equipment: LDI laser direct imaging (resolution ≤ 20 μ m, replacing traditional film), exposure energy 80-100mJ/cm ² (matching dry film thickness);

Developer solution: Sodium carbonate (Na ₂ CO ∝) solution (concentration 1-1.5%), the development speed needs to match the exposure energy (to avoid line width deviation).

2. Inner layer oxidation treatment

Enhance the adhesion between the copper surface of the core board and the PP sheet, commonly by blackening or browning:

Blacking: NaOH (50-80g/L)+KMnO ₄ (5-10g/L) solution oxidizes to form a CuO/Cu ₂ O mixed layer (thickness 0.5-1 μ m) with a surface roughness Ra of 0.8-1.2 μ m;

Browning: A solution of H ₂ SO ₄ (100-150g/L)+K ₄ [Fe (CN) ₆] (1-3g/L) generates Cu ₂ O nanowires (thickness 0.3-0.5 μ m) with Ra=0.5-0.8 μ m (more environmentally friendly).

3. Inner layer etching

To remove the unexposed copper layer and form an inner layer circuit, it is necessary to control:

Etch Factor: Line width/side etching amount ≥ 3:1 (conventional board 2:1), side etching rate ≤ 15% (to avoid thinning of the circuit);

Micro etching control: After etching, sodium persulfate (Na ₂ S ₂ O ₈)+sulfuric acid (H ₂ SO ₄) micro etching (Ra=0.3-0.5 μ m) is used to provide a rough interface for the transfer of outer layer graphics.

4. Inner layer inspection

AOI detection: automatic optical detection (resolution ≤ 20 μ m), identifying short circuits, open circuits, and line width deviations (tolerance ± 10%);

X-Ray detection: Measure the inner layer hole displacement (≤± 25 μ m) to ensure interlayer alignment with the foundation.

3、DRILLING AND ELECTROPLATING: THREE DIMENSIONAL INTERCONNECTED 'CHANNEL CONSTRUCTION'

Drilling and electroplating are the core processes for achieving interlayer electrical connections (via holes), which require breaking through the technical bottlenecks of high thickness to diameter ratio (AR=hole depth/hole diameter) and micro hole processing.

1. Drilling process

Mechanical drilling (through-hole/buried hole):

Aperture range: ≥ 0.2mm (laser drilling required for ≤ 0.1mm);

Drilling parameters: rotation speed S=100000-20000rpm (small aperture), feed rate F=0.01-0.03mm/r (to avoid tool breakage);

Hole wall quality: roughness Ra ≤ 3 μ m (to avoid electroplating voids), hole position accuracy ≤± 0.05mm (laser alignment requirement).

Laser drilling (blind/micro holes):

Equipment selection: UV laser (wavelength 355nm, spot diameter ≤ 15 μ m) is used for 0.05-0.2mm micropores; CO ₂ laser (wavelength 10.6 μ m) is used for 0.1-0.5mm holes;

Heat affected zone (HAZ): ≤ 50 μ m (to avoid burning the inner circuit), pulse frequency (50-100kHz) and power (5-15W) need to be adjusted;

Hole type control: taper ≥ 10 ° (ensuring electroplating filling effect), hole wall roughness Ra ≤ 2 μ m (reducing electroplating defects).

2. Hole metallization (PTH/pattern electroplating)

Deposition of thin copper (about 0.5-1 μ m) on the hole wall to make the insulating hole wall conductive, key process:

Full plate electroplating (PTH):

Electroplating solution: Copper sulfate (CuSO ₄ · 5H ₂ O, concentration 180-220g/L)+sulfuric acid (H ₂ SO ₄, concentration 10-15%)+chloride ions (Cl ⁻, 50-100ppm);

Current density: 1.5-3A/dm ² (conventional board), high thickness to diameter ratio (AR ≥ 10:1) needs to be increased to 3-5A/dm ²;

Thickness control: The thickness of the hole copper should be ≥ 0.8mil (1mil=25.4 μ m), and the thickness of the surface copper should be ≥ 1mil (for high layers, it should be ≥ 1.5mil).

Graphic electroplating (thickened outer layer):

Anode selection: Titanium basket filled phosphor copper ball (purity ≥ 99.9%, good leveling effect) or soluble copper plate (low current density);

Additives: Leveling agent (polyethylene glycol PEG, 0.1-0.3mL/L), accelerator (chloride ion Cl ⁻, 50-100ppm), inhibitor (thiourea, 0.5-1mL/L) (inhibits the "dog bone" effect, i.e. copper thickness at the pore opening>at the pore center);

Thickness uniformity: The deviation of copper thickness on the entire board is ≤± 5% (monitored by X-ray thickness gauge).

4、LAYERING PROCESS: MULTI LAYER CASCADING "PRECISION BONDING"

Layering is the process of alternately stacking inner core boards and PP sheets, and forming a complete structure through high-temperature and high-pressure curing. The core goal is the alignment accuracy between layers and the uniformity of medium thickness.

1. Stack Up Design

Symmetry: The core board and PP sheet should be symmetrically distributed (such as the same material for the first and eighth layers) to avoid warping after compression (Warpage ≤ 0.3%);

Dielectric thickness matching: Total dielectric thickness=∑ PP thickness+core plate thickness, calculated according to impedance requirements (such as 50 Ω differential line dielectric thickness deviation ≤± 3%);

Process edge and positioning hole: Reserve 5-8mm process edge (including Mark points and positioning holes) at the edge, with a hole diameter tolerance of ± 0.03mm (laser alignment accuracy requirement).

2. Vacuum lamination parameters

Temperature: The curing temperature of epoxy resin is 170-180 ℃ (phenolic resin is 150-160 ℃), and the heating rate is ≤ 3 ℃/min (to avoid premature flow of PP);

Pressure: Initial pressure 0.5-1MPa (discharge air), peak pressure 3-4MPa (ensure adhesion), holding time 60-90 minutes (resin fully cured);

Vacuum degree: Vacuum ≤ -0.095MPa (to prevent residual bubbles, HDI vacuum degree is twice higher than conventional boards).

3. Inter layer alignment (Registration)

Equipment: Laser alignment system (such as Orbotech Laser Alignment), measuring the offset of each layer's Mark points (4-8 points/layer);

Tolerance: Inner layer alignment is ≤± 15 μ m (conventional board is ≤± 25 μ m), outer layer alignment is ≤± 10 μ m (HDI high-precision board is ≤± 8 μ m).

5、 Outer layer production and surface treatment: functional "final decoration"

The outer layer needs to complete the transfer of circuit graphics and surface treatment to meet the requirements of weldability and protection. The key processes are as follows:

1. Transfer of outer graphics

Coating photosensitive adhesive: dry film thickness of 17 μ m (12 μ m for fine circuits), film temperature of 100-120 ℃ (to avoid wrinkling);

Exposure development: LDI laser imaging (resolution ≤ 15 μ m), exposure energy 90-110mJ/cm ² (matching ultra-thin dry film);

Etching: Acid etching (CuCl ₂ system, fast speed, low cost) or alkaline etching (NaOH system, low side etching rate, suitable for fine circuits) is used, followed by micro etching (Ra=0.3-0.5 μ m).

2. Surface treatment process

According to the application scenario selection, the core goal is to improve weldability and protection:

HASL: There are lead spray tin (Sn Pb, melting point 183 ℃, low cost) and lead-free spray tin (Sn Ag Cu, melting point 217 ℃, high cost), with a surface roughness Ra ≤ 1 μ m (suitable for ordinary components);

Chemical nickel deposition gold (ENIG): nickel layer (3-5 μ m, preventing copper diffusion)+gold layer (0.05-0.1 μ m, only covering the surface of the nickel layer), with a flat surface (Ra ≤ 0.05 μ m), suitable for BGA, QFP and other close pin components;

Immersion Ag: thickness 0.1-0.3 μ m, low cost (3-8 yuan/㎡), but prone to oxidation (storage period ≤ 3 months);

OSP (Organic Solderability Protective Agent): Thickness of 0.2-0.5 μ m, low cost (1-3 yuan/㎡), but short protection period (≤ 1 month), requiring controlled storage environment (humidity ≤ 40%, temperature ≤ 25 ℃).

6、FORMING AND TESTING: "FINAL VERIFICATION" FROM BLANK TO FINISHED PRODUCT

1. Molding process

V-cut splitting: Soft splitting is achieved through V-shaped grooves (depth ≤ 1/3 of the plate thickness), with a splitting accuracy of ≤± 0.1mm (suitable for mass production);

Gongban (CNC milling): Use a gongknife (diameter 0.8-2.0mm) to mill according to the Gerber contour, with a surface roughness Ra ≤ 3 μ m (suitable for irregular plates);

Punching board: Cut by mold (accuracy ≤± 0.05mm), suitable for large quantities and high-precision boards (such as mobile phone motherboards).

2. Detection and verification

Appearance inspection: manual or AOI inspection of circuit gaps, residual glue on hole walls, and surface dirt (defects ≤ 0.1mm ²);

Dimensional inspection: CMM (Coordinate Measuring Machine) measures hole position deviation (≤± 0.05mm) and plate thickness deviation (≤± 0.05mm);

Electrical testing:

Flying Probe Test: Point by point testing for conductivity/insulation (Single board testing fee 20-100 yuan);

ICT (Online Tester): Needle bed testing (suitable for mass production, with a testing coverage rate of ≥ 95%);

Reliability testing:

Thermal shock test: 500 cycles at -40 ℃~125 ℃ (without delamination/cracking);

Damp heat aging: 85 ℃/85% RH for 1000 hours (insulation resistance ≥ 100M Ω);

High frequency test: 28GHz millimeter wave (insertion loss ≤ 3dB).

SUMMARY: THE CORE LOGIC OF PCB MANUFACTURING

PCB production is a precision collaborative engineering of materials, processes, equipment, and testing. Its key lies in constructing precision circuits through inner layer pattern transfer and oxidation treatment, breaking through micro hole limits through drilling and electroplating, ensuring interlayer interconnection through lamination processes, and ultimately achieving functional and reliability goals through surface treatment and molding. With the development of 5G/6G and AI chips, PCB manufacturing is evolving towards finer lines (≤ 10 μ m), higher layers (≥ 20 layers), and lower Df (≤ 0.002), promoting continuous innovation in production processes.